A Cloud-9 — veterana empresa fabricante de expansões para CoCo dos mais variados tipos, sabores, texturas, formatos, tamanhos, gêneros e etnias — apresentou na última CoCoFest um protótipo funcional de uma placa que é um ataque nuclear no mundo retro: a SuperBoard, uma expansão encaixada internamente no seu CoCo 3 e que tem… bem, praticamente tudo e mais um pouco:

• Uma expansão de memória semelhante à Triad (só que com o quádruplo da capacidade);
• Porta serial de alta velocidade;
• Pro-Tector+;
• Leitor de SD;
• Porta de rede Ethernet;
• Porta de teclado PS/2;
• E, como dizem os americanos, the f***ing kitchen sink.

Reproduzimos abaixo o anúncio em inglês, feito neste comentário do Facebook:

This is a brief feature list for the SuperBoard as it stands right now.

Most of these are established products already. You can view the information at www.cloud9tech.com hardware tab.

All the heavy lifting I/O devices, USB, SPI, serial are being performed on an Atmel AVR Xmega series. This devices has priority interrupt capabilities, 4 DMA channels, serial ports that can run up to 2MBaud. The base clock is 32MHZ and the SRAM bus is running sys clock x 2, or 64MHZ.

• Single SD slot, library support at 8.3 filenames but might support LFN down the road. With pin change interrupt detection on the WP and CardDetect pins. IE: Automatic initialization of the FAT file structure upon removal or insertion.
• AES-128bit encrypted bootloader – Allows firmware updates to be distributed from the web site, place file on the SD card and then insert in to the slot. ReFlash occurs automatically.
• DS1307 RTC, synchronized with NTP servers via Internet, all configurable, up to 4 time servers supported, sync intervals, UTC offsets and DST.
• Pro-Tector+ / HD63x09EP based
• 2MB SRAM memory
• PS/2 Keyboard and Mouse interface, added comm channel so keys can be sent to keyboard port via Xmega host.
• USB serial – Device mode channel = COM port. SPI-Parallel interface via Xmega currently the test platform was transferring RAW data at 110KBytes, not bits per second. This is an order of magnitude over the current DW platform and any other device on the market.
• USB serial – Host mode channel = thumbdrive, etc. SPI-Parallel interface via Xmega
• Virtual ROM Pak Emulator 8/16/32K supported modes
• Via a configuration file or a Extended DriveWire command, at power up or at runtime, a ROM pak file stored under the FAT file structure will be loaded in to the virtual ROM pak and then appear in the CoCo’s memory map based upon the CC3’s configuration register. Proper cart execution will occur automatically depending on runtime or reset operation.
• Target load times are projected to be under 10mS.
• Bus control logic is hardware based. At power up / reset, both processors are reset, then the AVR takes over bus control, until the system is configured / ROM file loaded, etc. This will occur so fast that you won’t even know it.
• An additional 32K of SRAM for the AVR, this will give a total of 40K for extra buffer space. This SRAM is not shared with the CoCo like the ROM emulator’s SRAM is.
• All communications to/from the CoCo/AVR is via interrupts. All data/status register R/W commands are pin change interrupt based on the AVR. IE: No handshaking required on the CoCo. This will allow maximum bandwidth transfers.
• Currently the device is on a wired Ethernet Wiznet W5200 platform. Final target is projected to be a wireless connection option. I have not made this selection yet.

For those not at the fest, we presented this at one of the seminars. About an hour of information condensed down to this. I am sure I have missed something. Please don’t ask for cost projections at this point as that has not been determined. The design has cleared electrical DRC, the next major hurdle will be routing. The board will be at least four layers. The lower right corner has over 300 pins, this is going to drive the layer count up. So it is a dance at this point. There are circuits that need to be debugged, etc. So the timeline is, I am working on it.

All the chips in this mock up are on the top. I could have placed them on the bottom like in my other designs so to appear that they are chipless. In this case looking at a blank board wouldn’t have had the same effect. In the final design, there will be chips on the solder side of the board.

(Facebook)